Possible Future Transistors in VLSI

 

As the cost and complexity of each new process node has continued rising, advances have slowed noticeably, despite the fact that there are applications such as AI and machine learning, big data analysis and data center servers that require the latest and most powerful CMOS solutions.

Why? It has become so much more difficult to use MOSFET scaling techniques to achieve continued miniaturization that perpetuating Moore’s Law may finally pose manufacturing and fab-cost challenges that cannot be met.

Since its introduction in 1959, the field-effect transistor (FET) has been mostly built in the plane of the silicon. In 2012, at 20nm, the industry made the first transition from “planar” MOSFETs to fin field-effect transistor (FinFET) architectures to maintain the Moore’s Law scaling path.

In a FinFET, the channel between source and drain terminals is in the form of a fin. As compared to planar transistors, the fin – contacted on three sides by the gate – provided better control of the channel formed within the fin. As a result, FinFETs helped significantly with current leakage. Since then, fin height has been increased to obtain a higher device drive current at the same footprint. Today's designs place the gate stack directly above the channel area.

Drawback of Finfet:

One problem is that as these structures become smaller, it becomes more difficult to block the charge leak across the transistor. With FinFETs, the gate surrounds the rectangular silicon fin on three sides, leaving the bottom side connected to the body of the silicon. This allows some leakage current to flow when the transistor is off. The resulting leakage leads to hotter, less power-efficient microchips

Nanosheet/Gate all Around Transistors Or nanowire Transistors Vs   FINFET:

1. Unlike FinFET technology, in nanosheet technology the gate surrounds the channel region in its entirety, providing even better control of current leakage. This stacked structure supports far more advanced semiconductor fabrication processes, including a channel region that is tilted upward to create a wider path for current.
2. Rather than the transistor consisting of a vertical fin of silicon, the nanosheet’s channel region consists of multiple, horizontal, nanometer-thin sheets stacked atop one another. Nanosheet FETs incorporate several components, including a channel, which allows electrons to flow through the transistor.
3.  Nanosheets offer excellent electrostatics and short channel control, and can be fabricated with minimal deviation from FinFET.
4. A narrow nanosheet has less drive current, but takes up a smaller area. The narrow nanosheet also requires a more complicated, costly manufacturing process.